Originally Aired - Monday, December 11 • 10:20 AM - 11:10 AM PST
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Location: Grand Ballroom B
Title: 1-2 | Making Memory Magic and the Economics Beyond Moore's Law
Description:
Authors: The global semiconductor industry, driven by compute, automotive, data storage, and wireless markets, is projected to exceed a trillion-dollar in sales revenue by 2030 (Fig. 1), [1]. The mainstream memory industry bit shipment has increased by 12x for DRAM and 48x for NAND flash in the past decade [2] and this bit growth trend needs to be sustained through continued scaling in the future to meet the projected demands of global data creation (Fig. 2). In addition, generating value from the data is driving the need for memory to be closer to the compute and increase data bandwidth, speed, and energy per bit metrics. Delivering higher bandwidth and speed at lower energy while minimizing power has become a major challenge with respect to continued scaling of memory, which also must deliver year over year cost reduction at faster cadence. In this paper, we touch on DRAM and NAND scaling challenges and industry trends to tackle the power, performance, area, cost, and time (PPACt) requirements through design and technology co-optimization (DTCO). Such requirements are also driving memory development to explore advanced interconnect and innovative packaging solutions.
Thy Tran, Micron, Beau Barry, Micron, Kunal Parekh, Micron
Type: Plenary
Monday, December 11, 2023 - 09:00 AM
1 | Plenary
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